As integrated circuit features are scaled down, particularly with critical dimensions below 50 nm, and power density increases, electromigration becomes relatively more prominent. Electromigration is understood as the transport of material due to movement of ions in a conductor. Electromigration may result in the formation of hillocks or voids in the interconnects and may eventually lead to a reduction in reliability or failure of the circuit. To reduce electromigration, and other stress induced failures, refractory metals continue to be explored for use in interconnect fabrication. However, refractory metals exhibit increased bulk resistivity, which negatively influences observed resistance.
In addition, as feature size drops, interconnect delay may exceed gate delay and form a relatively large portion of total device delay. Interconnect delay is understood to be caused, at least in part, by resistive-capacitance delay. Resistive-capacitance delay, or RC delay, is understood as the delay of signal propagation as a function of resistance, which again is in part dependent on the bulk resistivity of the metal wire composition, and as a function of insulator capacitance, which is in part dependent on the permittivity of the interlayer dielectric. Materials exhibiting relatively lower resistivity in bulk are generally more prone to electromigration.
Therefore, as feature size continues to decrease, room remains for improvement in the design of interconnects with, in some instances, an emphasis on interconnect delay and resistance to various stresses, such as those resulting in electromigration and thermomechanical failures.